The present invention relates to sigma-delta modulators and, more particularly, to a single chip sigma-delta modulator utilizing micro electromechanical system (MEMS) technology and BiCMOS technology to provide a flexible, low power modulator.
There are two basic techniques for performing analog-to-digital conversion. An analog-to-digital converter (ADC) using the first technique, known as the Nyquist rate technique, generates a digital signal directly in response to an analog input signal. The Nyquist rate ADC samples the analog input signal at twice the frequency (known as the Nyquist frequency) of the highest expected frequency component of the input signal. The Nyquist rate ADC uses a series of precisely-matched components to digitize the input signal. The resolution and accuracy of the Nyquist rate ADC depend on the matching of these components. However, highly-precise components are difficult to achieve in conventional integrated circuit processing.
An ADC using the second technique, known as the sigma-delta technique, represents the analog input signal by generating a stream of digital samples whose pulse density is a measure of the voltage at the ADC input. The sigma-delta ADC includes a sigma-delta modulator and a decimator. The modulator includes a quantizer which generates a digital output signal in response to a filtered difference between the analog input signal and a feedback signal. The feedback signal is the digital output signal reconverted to an analog signal in a digital-to-analog converter (DAC). The modulator is oversampled, meaning that the sampling rate is above the Nyquist rate. The decimator resamples the output of the modulator and provides an N-bit data word at the Nyquist rate. The sigma-delta technique achieves high resolution by precise timing instead of by precisely-matched components (resistors and capacitors) which are required by the Nyquist rate ADC.
A simple sigma-delta ADC uses a first-order modulator with a single integrator performing the filter function, a one-bit quantizer, and a one-bit DAC. Since the quantizer can provide the output of the modulator at only one of two levels, its operation is necessarily linear. The first-order sigma-delta modulator has high quantization noise at the sampling frequency. The action of the filter in the modulator shapes the quantization noise to be higher at higher frequencies. Thus, the converter is referred to as a noise-shaping ADC. The decimator also includes a filter having a lowpass characteristic with a cutoff frequency at the Nyquist frequency. Since the sampling frequency is much higher than the Nyquist frequency, the filter can usually attenuate this out-of-band quantization noise sufficiently.
A second-order ADC having two filters in the modulator loop has higher out-of-band quantization noise but lower in-band noise than the first-order ADC. Thus, if the out-of-band noise can be sufficiently filtered, the second-order sigma-delta modulator has better performance. The necessary attenuation can be achieved if the decimation filter is one order greater than the order of the modulator. Further performance increases can be achieved using higher order modulators, although higher order modulators tend to be more difficult to stabilize.
Typically, sigma-delta modulators are implemented by designing the integrator either in the discrete-time domain (e.g., using switched-capacitor filters) or in the continuous-time domain (e.g., using RC, transconductor-C, and LC filters). A drawback of discrete-time modulators is that they are generally slower than their continuous-time counterparts. Continuous-time modulators, on the other hand, typically are implemented with off chip inductors, although designs have been attempted using on-chip inductors. The on-chip inductor designs, however, suffer from the limitations of the available Q for on-chip inductors in silicon and require active Q-enhancement circuits, which introduce noise and distortion. The on-chip inductors also have a limited frequency range, for a given inductance value, over which there is any significant Q value. In addition, center frequency tuning is accomplished using active circuitry, which resultantly degrades the overall thermal noise floor of the modulator as the center frequency is adjusted. Furthermore, such designs lack flexibility (e.g., the ability to dynamically adjust the modulator""s characteristics) at radio frequencies and thus do not include wideband frequency-hopping capabilities.
Accordingly, there is a need the art for a single chip sigma-delta modulator that can dynamically adjust its characteristics to provide frequency hopping capability in the radio frequency (RF) band. Additionally, it would be advantageous to provide a sigma-delta modulator that has a reduced number of active Q-enhancement circuits, and have an inductance value that has a high Q capability over a wide bandwidth.
In the light of the foregoing, the invention relates to a sigma-delta modulator that includes a substrate; at least one transconductance amplifier on the substrate; at least one digital-to-analog converter (DAC) on the substrate; a plurality of micro electro mechanical system (MEMS) switches on the substrate; and at least one LC network on the substrate, wherein a center frequency of the modulator is modified using at least one of the plurality MEMS switches.
Another aspect of the invention relates to a sigma-delta modulator that includes a substrate; at least one transconductance amplifier on the substrate; at least one digital-to-analog converter (DAC) on the substrate; at least one LC network on the substrate; and at least one MEMS variable capacitor on the substrate, wherein a center frequency of the sigma-delta modulator is modified by varying the capacitance of the at least one MEMS variable capacitor.